This invention relates to a magnetic switching element the and a magnetic memory, and more particularly, to the magnetic switching element which can generate magnetization in much lower power consumption than before by controlling a magnetization direction induced in a magnetic semiconductor, and the magnetic memory using the switching element.
Magnetoresistance effect element using a magnetic film is used for the magnetic head, the magnetic sensor, for example, and there is a proposal to use the magnetoresistance effect elements in a solid-state magnetic memory (magnetoresistance effect memory or MRAM (Magnetic Random Access Memory)).
Recently, a so called “tunneling magnetoresistance effect” element (TMR element) has been proposed as a magnetoresistance effect element configured to flow a current perpendicularly to the film plane in a sandwich-structured film interposing a single dielectric layer between two magnetic metal layers and to use the tunneling current.
Since tunneling magnetoresistance effect elements have been improved to ensure 20% or higher ratio of change in magnetoresistance (J. Appl. Phys. 79, 4724 (1996)), the possibility of civilian applications of MRAM is increasing.
A tunneling magnetoresistance effect element can be obtained by first forming a thin Al (aluminum) layer, 0.6 nm through 2.0 nm thick, on a ferromagnetic electrode, and thereafter exposing its surface to a glow discharge of oxygen or oxygen gas to form a tunnel barrier layer of Al2O3.
There is also proposed a ferromagnetic single tunneling junction structure in which an anti-ferromagnetic layer is provided in one of the ferromagnetic layers on one side of the single ferromagnetic tunneling junction and the other ferromagnetic layer is used as a magnetically pinned layer (Japanese Patent Laid-Open Publication No. H10-4227).
Other type ferromagnetic tunneling junction structures, namely, one having a ferromagnetic tunneling junction via magnetic particles distributed in a dielectric material and one having double ferromagnetic tunneling junctions (continuous film) have been proposed as well (Phys. Rev. B56(10), R5747 (1997), J. The Magnetics Society of Japan 23, 4-2, (1999), Appl. Phys. Lett. 73(19), 2829 (1998), Jpn. J. Appl. Phys. 39, L1035 (2001)).
Also these ferromagnetic tunneling junctions have been improved to ensure a ratio of magnetoresistance change from 20 to 50% and to prevent a decrease of the ratio of magnetoresistance change even upon an increase of the voltage value applied to tunneling magnetoresistance effect elements to obtain a desired output voltage, and there is the possibility of their applications to MRAM.
Magnetic recording elements using such a singe ferromagnetic tunneling junction or double ferromagnetic tunneling junctions are nonvolatile and have high potentials such as high write and read speed not slower than 10 nanoseconds and programmable frequency not less than 1015 times.
Especially, ferromagnetic double-tunneling structures ensure large output voltages and exhibit favorable properties as magnetic recording elements because the ratio of magnetoresistance change does not decrease even upon an increase of the voltage value applied to tunneling magnetoresistance effect elements to obtain a desired output voltage value as mentioned above.
With regard to the memory cell size, however, those existing techniques involve the problem that the size cannot be decreased below semiconductor DRAM (dynamic random access memory) when a 1 Tr (transistor)-1 TMR architecture (disclosed, for example, in U.S. Pat. No. 5,734,605) is employed.
In order to overcome the problem, there are proposals such as a diode-type architecture in which TMR cells and diodes are serially connected between bit lines and word lines (U.S. Pat. No. 5,640,343), and a simple-matrix architecture in which TMR cells are placed between bit lines and word lines (DE 19744095, WO 9914760).
However, in any case, at the time of writing to a record layer, magnetization reversal is performed by applying a current magnetic field generated by a current pulse.
For this reason, the power consumption of a memory is large, when integrated, and there is a problem that a large scale memory cannot be carried out since there is a current density limit of wiring. If an absolute value of writing current is larger than 1 mA, area of a driver for passing the current will become larger.
For this reason, there is a problem that chip size becomes large, in comparison with non-volatile solid memories (for example, FeRAM (ferroelectric random-access memory), FLASH (flash memory), etc.) of other types of memories.